This invention relates to semiconductor integrated circuits (ICs) of the type which incorporate digital or high frequency switching transistors, and ICs of the type in which it is desirable to incorporate transistors on the same substrate which have gate insulators of relatively great differential in thickness, such as digital switching transistors and analog linearly-responsive transistors on a xe2x80x9chybridxe2x80x9d IC. This invention also relates to methods of manufacturing transistors which operate at higher frequencies and to methods of manufacturing hybrid ICs. More particularly, the present invention relates to a new and improved method of fabricating a reduced thickness gate insulator of a high frequency switching transistor, and doing so in a hybrid circuit while the gate insulator of an analog linear transistor is maintained relatively thick. The present invention also relates to a new and improved hybrid IC which has a relatively greater differential in the thickness of the gate insulator of two types of transistors, for example digital switching transistors and analog response transistors. The relatively thinner gate insulator of higher frequency switching capability at low voltage, while the relatively thicker gate insulator maintains a better linear response at high voltage to enhance the analog aspects of the hybrid IC.
Recent evolutions of semiconductor IC electronics have combined digital and analog circuitry on the same chip or substrate. Such ICs are known as xe2x80x9csystems on a chip,xe2x80x9d system level integrated circuits (SLICs) or application specific integrated circuits (ASICs). The combination digital and analog circuitry on the same IC is also sometimes referred to as xe2x80x9chybridxe2x80x9d or xe2x80x9cmixed signalxe2x80x9d technology. Combining digital and analog circuitry on a hybrid IC simplifies the construction of many electrical devices which require both digital and analog signals. A single hybrid IC may be used in place of multiple ICs. Previously, it was typical practice to separate the digital circuitry and the analog circuitry, with each type of circuitry confined to its own separate IC and IC package. It was then necessary to connect the separate ICs together with a printed circuit or other connection. Combining the digital and analog circuitry on the same hybrid IC reduces the cost, complexity and size of the electronic circuitry compared to connecting separate digital and analog circuit ICs.
Digital and analog circuitry have somewhat different functional considerations, and satisfying those considerations simultaneously has imposed significant constraints on the semiconductor fabrication techniques used to manufacture hybrid ICs. Since both the digital and analog circuitry must be fabricated on the same substrate, the analog and digital components must be formed simultaneously when fabricating the single hybrid IC. The semiconductor fabrication techniques and processes used for such hybrid circuits must accommodate and secure the required functional behavior of both the digital and analog circuitry. Since semiconductor fabrication techniques may be oriented to optimize the performance of the digital circuitry or the analog circuitry, but usually not both, it is typical that most hybrid ICs are formed by semiconductor fabrication technology which somewhat compromises both the digital and analog functional characteristics.
One area of compromise relates to the functional requirements of the digital switching transistors and the analog linear transistors. Generally speaking, the digital switching transistors operate at a lower voltage on the hybrid IC, typically in the neighborhood of approximately 1.0-1.5 volts. The lower voltages are used because less power is consumed and because the on/off, conductive/nonconductive characteristics of the digital switching transistors do not require a linear response between their conductive and nonconductive states. Instead, the primary consideration with respect to digital transistors is achieving higher frequency or higher speed switching rates. In contrast, the analog linear transistors require a larger operating voltage, typically in the neighborhood of approximately 2.5-5.0 volts. The higher voltage is required to develop a sufficient magnitude for the analog signals and to provide the analog transistors with enough voltage range to allow them to operate in their linear transconductance or response range.
The differing functional requirements for digital and analog transistors are revealed perhaps most significantly in regard to the thickness of the gate insulator used in each type of transistor. In digital switching transistors, the gate insulator is kept as thin as possible, because the thinner insulator will result in higher frequency switching capability. Also, the lower operating voltages of digital switching transistors require a thinner insulator to maximize driving current. In analog linear transistors, the gate insulator is kept relatively thick, because a relatively thick gate insulator more effectively establishes linear response characteristics with better noise immunity. The higher operating voltages are also better tolerated by a thicker gate insulator, particularly for reliability considerations. However, in hybrid ICs, where the gate insulators of both the digital and analog transistors must be formed simultaneously, it has been particularly challenging to achieve semiconductor fabrication techniques which permit a relatively thinner gate insulator for the digital transistors and a relatively thicker gate insulator for the analog transistors.
Another consideration is that the material structure of the gate insulator for the relatively thinner digital switching transistors must be sufficient to prevent the out-diffusion of boron from a P-type gate when the IC is subjected to relatively high temperatures during the fabrication process. A chemically and modified, pure silicon dioxide thin gate insulator permits the out-diffusing dopant to enter the substrate and shift threshold voltages uncontrollably, thereby destroying or significantly impairing the proper functionality of the digital transistor. Because of the problem of out-diffusion, it is typical to introduce nitrogen in the relatively thinner gate insulator of the digital transistors. One such method is nitrogen implantation in the thin gate area. The implanted nitrogen blocks the out-diffusing boron and prevents the boron from entering the substrate. Although the thinner gate insulator has a tendency to permit more tunneling leakage current between the gate and the channel, the nitrogen in the gate insulator of the digital transistor significantly diminishes the amount of leakage current by increasing the dielectric constant. On the other hand, the relatively thicker gate insulator of the analog transistor generally provides a sufficient barrier to the leakage current, simply as a result of its relatively greater thickness. For these reasons, it is typical that the relatively thinner gate insulator of digital transistors be formed of silicon oxynitride, which results from oxidizing the silicon substrate that has been implanted with sufficient nitrogen.
It is with respect to these and other considerations that the present invention has evolved.
The present invention involves the use of nitrogen implantation to fabricate digital switching transistors with a relatively thinner silicon oxynitride gate insulator compared to previous silicon oxynitride gate insulators. The present invention also involves fabricating the gate insulator of digital switching transistors from a relatively thinner layer of silicon oxynitride while fabricating the gate insulator of analog linear transistors from a relatively thicker layer silicon dioxide, in a singular semiconductor fabrication process. The invention also involves a gate insulator fabrication technique for hybrid ICs which achieves a greater differential in the relative thicknesses of the gate insulators of the digital transistors and the analog transistors. Another aspect of the present invention involves the exploitation of a discovery relating to the atomic structure of silicon oxynitride gate insulators formed by implanting nitrogen in silicon dioxide, which allows those silicon oxynitride gate insulators to be effectively and easily diminished in thickness. A further aspect of the invention involves the fabrication of higher performance, higher switching frequency digital transistors, either on a digital IC or in combination with analog linear transistors on a hybrid IC.
These and other aspects are accomplished in a method of forming a relatively thin gate insulator of a digital switching transistor from a layer of silicon oxynitride initially formed by implanting nitrogen atoms in a silicon substrate and oxidizing the nitrogen and silicon. The steps of the method include forming an outer layer of silicon dioxide as a part of the silicon oxynitride layer formed by oxidizing the nitrogen and silicon, removing the outer layer of silicon dioxide from the silicon oxynitride layer to leave a remaining layer of substantially only silicon oxynitride, and using the remaining layer of substantially-only silicon oxynitride to form the gate insulator. To the extent that this method is practiced on a hybrid circuit having gate insulators of different thicknesses, a thickness differential is established between the implanted thin region and the un-implanted thick region.
The initially formed layer of silicon oxynitride is, for example, approximately 22-29 angstroms in thickness for a thickness of 60 angstroms of relatively thick oxide, depending on oxidizing ambient conditions. The outer layer of silicon dioxide is approximately 8-12 angstroms in thickness, for example, and the removal of the outer layer forms the substantially-only silicon oxynitride gate insulator layer of approximately 15-21 angstroms in thickness as an optimized final target range. The substantially-only silicon oxynitride gate insulator layer is substantially thinner and results in a higher frequency switching capability as well as a greater differential between the thicknesses of the gate insulators of the digital transistors and the analog linear transistors in a hybrid IC.
To fabricate the digital transistor and the analog transistor on the same substrate of a hybrid IC, a relatively thick gate insulator of the analog transistor is formed by oxidizing the silicon substrate into a relatively thick layer of silicon dioxide. In this method, the relatively thick layer of silicon dioxide is formed to an initial thickness which is greater than the desired final thickness of the gate insulator of the analog transistor, and an upper portion of the relatively thick initial layer of silicon dioxide for the analog transistor gate insulator is removed simultaneously with the outer layer of silicon dioxide from the silicon oxynitride layer which forms the thin gate insulator for the digital transistor. The relatively thick layer of silicon dioxide for the analog transistor gate insulator is formed simultaneously with forming the layer of the silicon oxynitride, and the same amount of the upper portion of the relatively thick initial layer of silicon dioxide for the analog transistor gate insulator is removed simultaneously with the outer layer of silicon dioxide from the silicon oxynitride layer.
Further preferred aspects include applying thermal energy during the oxidizing step, oxidizing an initial layer of silicon dioxide on a surface of the substrate to prevent the implanted nitrogen atoms from out-diffusing from the substrate, converting approximately a lower half of the initial surface layer of silicon dioxide into silicon oxynitride, removing approximately the upper half of the initial surface layer of silicon dioxide, and etching away the layers of silicon dioxide by placing the outer layer of silicon dioxide in a bath of hydrofluoric acid.
Other aspects of the invention relate to a high frequency digital switching transistor formed on the silicon substrate having a gate insulator layer of approximately 15-21 angstroms in exemplary thickness formed of substantially-only silicon oxynitride. The high frequency digital switching transistor may be part of a hybrid integrated circuit which also includes an analog linear transistor formed on the silicon substrate, in which the analog linear transistor has a gate insulator layer of 60 angstroms in exemplary thickness formed of silicon dioxide. The gate insulator layer of the digital transistor is preferably formed by implanting nitrogen atoms into the silicon substrate, oxidizing the nitrogen and silicon to form a layer of the silicon oxynitride, forming an outer layer of silicon dioxide as a part of forming the silicon oxynitride layer, removing the outer layer of silicon dioxide from the silicon oxynitride layer to leave a remaining layer of substantially-only silicon oxynitride, and forming the gate insulator from the remaining layer of substantially-only silicon oxynitride. The gate insulator layer of the analog transistor in a hybrid IC is preferably formed by simultaneously occurring steps such as oxidizing the relatively thick layer of silicon dioxide to form the analog transistor gate insulator while oxidizing the nitrogen and silicon to form a layer of the silicon oxynitride, and removing the upper portion of the relatively thick initial layer of silicon dioxide for the analog transistor gate insulator simultaneously with removing the outer layer of silicon dioxide from the silicon oxynitride layer.
A more complete appreciation of the present invention and its scope, and the manner in which it achieves the above noted improvements, can be obtained by reference to the following detailed description of presently preferred embodiments of the invention taken in connection with the accompanying drawings, which are briefly summarized below, and the appended claims.